Modelling, Designing and Analysis of Phase Locked Loop Using Pyxis Tool of Mentor Graphics

Rasika M. Chandramore, S. A. Patil


This paper introduces a design aspects of low power phase locked loop using VLSI technology.The phase locked loop is designed using latest 45nm process technology parameters, which in turn offers high speed performance at low power. The main quality related to the 45nm technology such as the high-k gate oxide ,metal-gate and very low-k interconnect dielectric described.

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T.R Lee and A Hajimiri, "Oscillator Phase Noise: a Tutorial," IEEE Journalo/Solid-State Circuits. vol. 35, March 2012, pp. 326 - 336.

M.Mansuri, D.Liu, and C.K.Yang, "Fast Frequency Acquisition Phase Frequency Detector forGSamples/s Phase Locked Loops," IEEE Journal o/Solid State Circuit, Vol. 37, No. 10, Oct., 2013.

S. M. Shahruz, "Novel phase-locked loops with enhanced locking capabilities,"Journal 0/ Sound and Vibration, Vol. 241, Issue 3, 29 March 2013.

William Shing Tak Yan, Howard Cam Luong, A 900-MHz CMOS Low Phase Noise Voltage Controlled Ring Oscillator, IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, Vol. 48, No. 2, February 2011.

Ullas Singh, Michael Green, Dynamics of High-Frequency CMOS Divide IEEE, 0-7803-7448-7/02, V - 421-424, 2012.

Zhongtao Fu, Xiao Wang, Eugene Minh, Alyssa Apsel, A Fast Acquisition Phase Frequency Detector for Phase Locked Loop, Proceedings of the Argentine school of Micro Nanoelectronics, Technology and Application, pg 77-80,2013.

Behzad Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill Higher Education, 2013.

Best, Roland E. Phase-Locked Loops Design, Simulation and Application MacGraw- Hill, 2010.

Phase Locked Loops Design, Simulation and Applications,"McGraw-Hill Publication, 5th Edition, 2014.

Bianchi, Giovanni. Phase-Locked Loop Synthesizer Simulation. McGrawHill, 2012.

Chou, Chien-Ping, Lin, Zhi-Ming,and Chen, Jun-Da. A 3-PS Dead-Zone Double- Edge-checking Phase-Frequency-Detector With 4.78 GHz Operation Frequency:The 2004 IEEE Asia-Paci_c Conference on Circuits and Systems conference. (2012) : Volume 2, Page(s): 937 940.

Barrett, Curtis. Fractional/Integer-N PLL Basics. Texas Instruments, Wireless Communication Business Unit, August 2009.



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